module arithmetic_shift(
  input signed [7:0] iA,
  input  [2:0] iBit,        // 移位的位数 0~7
  output signed [7:0] oSLL, // 逻辑左移
  output signed [7:0] oSRL, // 逻辑右移
  output signed [7:0] oASL, // 算术左移
  output signed [7:0] oASR  // 算术右移
); 
 
assign oSLL = (iA <<  iBit),
       oSRL = (iA >>  iBit),
       oASL = (iA <<< iBit),
       oASR = (iA >>> iBit);
 
endmodule